An Oversampling Data Recovery Receiver for Serial Link Communications
碩士 === 輔仁大學 === 電子工程學系 === 91 === This thesis investigates an oversampling architecture for high-speed data recovery in serial link communications, which it provides another alternative in addition to the conventional clock/data extraction approach. By taking advantage of the A...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/54153654508551040100 |