A Digital Frequency Modulator Based On A Phase-Locked Loop
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 91 === This thesis implements a spread spectrum clock generator (SSCG) with new algorithm of digital frequency modulation. The spread spectrum clock generator is composed of 200MHz phase look loop (PLL), parallel data queue, and digital frequency modulator. Conventio...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/40493039639107860789 |