A 5.8GHz CMOS Wireless LAN Receiver Front-end Circuit
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 91 === This thesis presents the design and implementation of a single-chip CMOS receiver for IEEE 802.11a wireless LAN application. For a monolithic implementation, the use of the Low-IF architecture alleviates the necessity of off-chip components, used for image-rej...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/44282422411017395965 |