The Defect Count Control Process Considering Wafer-to-Wafer and Lot-to-lot Variation
碩士 === 國立交通大學 === 工業工程與管理系 === 91 === In integrated circuit (IC) fabrication, the appearance of wafer defects is unavoidable. Because defects influence the yield of a wafer, it is necessary to control defects to enhance the wafer quality. A Poisson distribution based c-chart is generally utilized...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2003
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Online Access: | http://ndltd.ncl.edu.tw/handle/06196865170654890251 |