Reliability of VLSI-Level Chips, Active Devices under CMOS I/O Pads, and Autonomous Design of Technology Intellectual Property
博士 === 國立交通大學 === 電子工程系 === 91 === This dissertation presents the modeling and characterization of reliability of the large-die-size VLSI-level chip in two different back-end CMOS technologies, generic 0.18 $\mu m$ six-level AlCu-hydrosilsesquioxane (HSQ) and specifi...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2002
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/14781603578601567337 |