Design of 802.11a Baseband Transmitter and Synchronization
碩士 === 國立交通大學 === 電子工程系 === 91 === In this thesis, an easy controlled and low-latency IEEE WLAN 802.11a transmitter and synchronization with low remaining CFO are presented. For the transmitter (packet composer), it contains nine main modules with each having a chip-enable signal to achie...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2003
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/15197194644085631650 |