hMetis-based Partitioning of Instruction Decoder for Power Minimization
碩士 === 國立清華大學 === 資訊工程學系 === 91 === For microprocessor-based embedded systems, instruction fetching and decoding usually contribute a large percentage of system power. In addition, the frequencies of the instruction types to be used usually have uneven distribution. Based on the observati...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2003
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/61181547291474490225 |