The Design and Implementation High-Resolution Oversampling delta-sigma Analog-to-Digital Converte
碩士 === 國立海洋大學 === 電機工程學系 === 91 === A high-resolution third-order cascade ΣΔ analog-to-digital modulator is designed in this paper. The entire analog-to-digital converter contains two section: an analog modulator and a digital decimation filter. The modulator with oversample rate of 128 c...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/18252734734584220198 |