Minimizing Coupling Jitter in Multiple Clock Networks
博士 === 國立臺灣大學 === 電機工程學研究所 === 91 === Crosstalk noise is a crucial factor affecting chip performance in deep submicron technologies. Among all possible crosstalk noise sources, clock is the most common aggressor as well as victim. Crosstalk on clock nets can increase coupling jitter, which may degra...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2003
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| Online Access: | http://ndltd.ncl.edu.tw/handle/94422126303274728418 |