A Novel VLSI Architecture for Block-Matching Using Shift-Register Based Memory Modules
碩士 === 中原大學 === 電機工程研究所 === 92 === In most video compression, motion estimation exploits high computation complexity and high memory bandwidth. The high computation complexity can be overcome by the adoption of the VLSI architectures with multiple processing elements. However, without sufficient inp...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/96v4zq |