Design of Low-Power Fully Parallel Content-Addressable Memories
博士 === 國立成功大學 === 電機工程學系碩博士班 === 92 === This thesis presents two novel VLSI architectures for high-speed and low-power fully parallel CAM design. These two proposed architectures are 1) precomputation-based content-addressable memory (PB-CAM) and 2) pseudo-CMOS content-addressable memory (PC-CAM)....
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| Format: | Others |
| Language: | en_US |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/35572877057600666391 |