A Dual RISC Core for SoC Platform
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 92 === In this thesis, we propose a dual homogeneous processor architecture for web-based multimedia application. The key concept in this dual homogeneous processor design is that one RISC core is responsible for processing multimedia computation while the other take...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2004
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Online Access: | http://ndltd.ncl.edu.tw/handle/44532058444492005944 |