Fabrication and Characterization of Polysilicon Thin Film Transistors with Multiple Nano-wire Channels

• Main Authors: Chi-Shen Chen, 陳稚軒
• Other Authors: S.M. Sze
• Format: Others
• Language: en_US
• Published: 2004
• Online Access: http://ndltd.ncl.edu.tw/handle/seydkc

碩士 === 國立交通大學 === 電子工程系所 === 92 === We have studied the gate controllability of lightly-doped drain (LDD) polycrystalline silicon thin-film transistors (poly-Si TFTs) with multiple channels and different widths. We deserve that devices with an LDD structure exhibit low leakage current. Additionally, the poly-Si TFT (M10) with ten strips multiple nano-wire channels exhibits the best and the most stable electrical characteristics than all other structures we have studied, such as a higher ON/OFF current ratio (>108), a steeper subthreshold slope (SS, 110 mV/decade), an absence of drain-induced barrier lowering (DIBL), and a improved suppressed kink-effect. Experiments results show the gate controllability is increasing with channel number from single channel to ten strips multiple channels. The M10 TFT also shows the best stress characteristics, as Vth and SS of the M10 TFT remain constant before and after the stress. Devices with the proposed TFTs are highly promising for use in active-matrix liquid-crystal-display technologies without any additional processes.