A High Speed Phase Adjustable ROM-less DDFS and Low-Power SRAM Design
碩士 === 國立中山大學 === 電機工程學系研究所 === 92 === This thesis includes two topics. The first topic is a high speed phase adjustable ROM-less DDFS (Direct Digital Frequency Synthesizer). The second one is a low-power SRAM design. The high speed phase adjustable ROM-less DDFS employs trigonometric quadruple an...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/45152657259187279132 |