Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure
碩士 === 國立清華大學 === 資訊工程學系 === 92 === Design verification has become a bottleneck of modern designs and dominates the whole VLSI design process. Recently, simulation-based random verification has attracted a lot of interests due to its effectiveness in uncovering obscure bugs and due to its automation...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2004
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Online Access: | http://ndltd.ncl.edu.tw/handle/24842720513393436103 |