Dynamic CPU and I/O Device Voltage Scheduling for Low Power Real-Time Systems
碩士 === 國立臺灣大學 === 電機工程學研究所 === 92 === In this thesis, we present a class of non-greedy dynamic voltage scaling algorithms called Integrated processor and devices DVS (IDVS) that is aimed to reduce extra energy consumption caused by the greedy DVS approach. The greedy DVS method tries to reduce the p...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/84443294951960609459 |