An Efficient Multi-Scan-Chain Optimization Using Physical Layout Information
碩士 === 淡江大學 === 電機工程學系 === 92 === In deep sub-micron, the circuits become larger and higher in density, and the problem of increased scan-test time becomes crucial when scan design method is employed. The multiple scan chain design method is an effective method reducing scan test time because it red...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2004
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| Online Access: | http://ndltd.ncl.edu.tw/handle/47773226782198470717 |