Design and Implementation of Highly Efficient VLSI Architecture for the 2-D Discrete Wavelet Transform

碩士 === 大同大學 === 電機工程學系(所) === 92 === In this thesis, we present a highly efficient VLSI architecture for the direct two -dimensional wavelets transform (2-D DWT), the proposed architecture is based on the recursive pyramid algorithm and systolic VLSI architecture. Then, the filter coefficients of th...

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Bibliographic Details
Main Authors: Po-Lan Chen, 陳柏嵐
Other Authors: Yaw-Fu Jan
Format: Others
Language:en_US
Published: 2004
Online Access:http://ndltd.ncl.edu.tw/handle/92306417592660040658