A Clock/Data Recovery Circuit and an Efficient I/O for Chip-to-Chip Communication
碩士 === 國立中興大學 === 電機工程學系 === 93 === Recently, as the fabrication technology advances, combining with the increasing computational capability of processor, there is growing interest in the use of chip-to-chip serial links technology. The research of this thesis focuses on designing a high-speed seria...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2005
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/95541713137768846833 |