Leakage Management for On-Chip L1 Instruction Cache in Embedded Processor
碩士 === 國立交通大學 === 資訊工程系所 === 93 === Since requirement of battery usage in many embedded systems, low power design trends to increase life time and has become an important issue for embedded processor design. When the technology continues to scales down, the leakage power due to leakage current in ‘o...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2005
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/63734949588893714405 |