| Summary: | 碩士 === 國立交通大學 === 電子工程系所 === 93 === In this work, F was incorporated before the source/drain implant step, which was subsequently diffused into the gate stack during later dopant activation. Effects of fluorine (F) on the reliabilities of pMOSFETs with HfO2/SiON gate stack have been thoroughly studied. We found that F introduction only negligibly impacts the fundamental electrical properties of the fabricated transistors. In addition, under constant voltage stress (CVS) and negative bias temperature stress (NBTS), lower generation rates of interface states and charge trapping are observed for devices with F incorporation, thus enhances high-k devices’ stability and reliability.
Next, effects of plasma charging and fluorine incorporation on the NBTI of p-channel MOSFETs with HfO2/SiON gate stack were explored in this work. From charge pumping measurements, we confirm that the interface-state density is increased for devices with large antenna ratio, both before and after the BTS. It is clearly shown that the threshold voltage shift during negative bias-temperature stressing (NBTS) is deteriorated by plasma charging damage, causing severe hole traps. More importantly, we also found that hole trappings are aggravated in HfO2 film as compared to interface trap generation by plasma charging, even on virgin devices with large antenna area ratios prior to negative BTS. This result is different from that observed in traditional pMOSFETs with SiO2 gate dielectric where electron trapping is dominant. Fluorine incorporation would effectively improve plasma charging immunity, thus reducing the severe hole trapping under NBTS for devices with large antenna area ratios.
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