A Power-Efficiency CMOS Analog-to-Digital Converter Design for Ultra-Wideband Wireless Applications
碩士 === 國立交通大學 === 電子工程系所 === 93 === A CMOS 5-bit 1GSamples/s flash analog-to-digital converter (ADC) implemented in 0.18-�慆 CMOS technology for low-power ultra-wideband (UWB) wireless applications is presented. A power-efficient architecture by combining the cascade resistive averaging and digital e...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/07375179854470687131 |