Design of Energy-Aware Function Units for Embedded Processors
碩士 === 國立交通大學 === 電子工程系所 === 93 === Clock gating is a well-known technique to effectively reduce the clock power. By ANDing the clock with a gate-control signal, clock gating essentially disables the clock to a circuit whenever the circuit is not used. Specifically, clock gating targets the clock po...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/92001332698086257310 |