Circuit Design of Highly Efficient AES Integrated Encryptor and Decryptor
碩士 === 國立交通大學 === 電機資訊學院碩士在職專班 === 93 === The algorithm of Advanced Encryption Standard (AES) is divided into encryption and decryption. This paper proposes a new algorithm to simplify MixColumn and Inverse MixColumn of AES and designs hardware architecture to integrate the algorithm of encryption a...
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| Format: | Others |
| Language: | zh-TW |
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2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/68309676529901097810 |