| Summary: | 碩士 === 國立清華大學 === 工業工程與工程管理學系 === 93 === Nowadays, the procedures of semiconductor manufacturing have become more and more sophisticated. Though highly automated facilities are used to process the complex manufacturing steps in the near particle free environment, the yield loss is still unavoidable. Manufacturers must develop a method that enables them to improve yield. Recognizing the existence of a systematic defect provides a clue to identifying the equipment or process abnormality responsible for the defect. However, the process of defect classification is time-consuming, monotonous and costly and causes fatigue and eye-strain, which in turn cause errors in classification. For these reasons, this research intends to propose a two-phases defect pattern recognition system. The first phase is to use the masks and thresholds to eliminate the wafers with random defects and identify the existence of the systematic defects. At the same time, the features extracted from systematic defects are the inputs for constructing the neural network in the second phase. After training three supervised learning neural networks, this research compares these two neural networks by MSE of training and testing samples, and selects the better neural network.
The developed methodology is verified with industrial data from a famous semiconductor company. The existing neural-network approaches for recognizing the defect patterns on the wafer are limited by the size and the orientation of defect patterns. The experimental results demonstrate that the proposed methodology can not only solve this problem by extracting features, but also effectively identify the defect patterns on the wafer.
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