interconnect driven technology mapping in IC design
碩士 === 國立臺灣大學 === 資訊工程學研究所 === 93 === For deep-submicron and high-performance circuits, the interconnection delay plays a very important role in determining the circuit performance. In this thesis, we minimize final interconnections cost during the process of spare cell selection for functional chan...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/75217939293176602731 |