| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 93 === With the growing complexity of SOC designs, the SOC test scheduling problem becomes a great issue. A good test scheduling can greatly decrease the total test time. When we investigate the scheduling problem, the power consumption, TAM bus assignment, and individual test time must all be considered. Hence, the test scheduling can be thought as the 3-D bin packing problem.
In this thesis, we adopt the Sequence-Pair representation combining with the Simulated-Annealing process to construct the basic frame. Using the shortest-first concept, we proposed our initial scheduling method to generate a legal result instead of generating it randomly which is experimentally proven to be time wasting. Besides, the tree graph comprehended in Sequence-Pair is used to check the constraints when doing perturbations. The experimental results show that we can obtain a better solution within an acceptable run time by our proposed algorithm.
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