A Charge-Pump Phase-Locked Loop with High Stability over Temperature Variation
碩士 === 中華大學 === 電機工程學系碩士班 === 94 === Owing to the system on a chip (SOC), phase-locked loops (PLL) are more closer to our life. In this paper, a charge-pump PLL (CPLL) with high stability over temperature variation is proposed. The CPLL is composed of phase frequency detector (PFD), a charge pump (C...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/00314962290156980886 |