Simulation and Analysis of Power Integrity on Print Circuit Boards
碩士 === 大葉大學 === 電信工程學系碩士班 === 94 === As the clock rate of digital system increase rapidly, it becomes more and more difficult to maintain power integrity for power distribution system. In order to suppress the voltage fluctuation between power and ground planes, input impedance for all of the switch...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/79638410283769095730 |