A PLL Circuit with Self-Frequency-Calibration
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 94 === This thesis can be divided into three major parts: In the first part we concern about the design of a general phase lock loop (PLL) including a phase-frequency detector (PFD), a charge pump (CP), a second-order low pass filter (LPF), a voltage controlled oscil...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/67461192597091009983 |