Improving Software-Based Self-Testing with Multiple-Level Abstractions for Embedded Processors
碩士 === 國立成功大學 === 電腦與通信工程研究所 === 94 === Besides hardware BIST and scan chains, software-based self-testing (SBST) is an alternative to test a processor core, and this methodology is becoming more and more popular. As implied in the name, in SBST methodology a processor executes its instruction seque...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/26099496693720695275 |