Study On Complementary Metal Oxide Semiconductor Integrated Circuit Comparator For System Applications
碩士 === 國立暨南國際大學 === 電機工程學系 === 94 === The major objective of this thesis is to set up testing procedures and key electrical parameter for low-power comparators. The 100umX200um chip size of two-stage comparator has been fabricated in 0.5um 1P1M BiCMOS process technology. The results of measurement s...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/73055855659624117620 |