The Chip Design of Floating point Digital Signal Processor for speech Recognition
碩士 === 國立暨南國際大學 === 電機工程學系 === 94 === In this thesis, we proposed a digital signal processor for speech recognition. Based on its specific instruction set, we implement the linear prediction coefficients and dynamic time warping algorithms. We use hardware-software co-design methodology to optimize...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/01423788174994370231 |