The Chip Design of Floating point Digital Signal Processor for speech Recognition
碩士 === 國立暨南國際大學 === 電機工程學系 === 94 === In this thesis, we proposed a digital signal processor for speech recognition. Based on its specific instruction set, we implement the linear prediction coefficients and dynamic time warping algorithms. We use hardware-software co-design methodology to optimize...
Main Authors: | Jia-Cheng Liu, 劉家誠 |
---|---|
Other Authors: | Gin-Der Wu |
Format: | Others |
Language: | zh-TW |
Published: |
2006
|
Online Access: | http://ndltd.ncl.edu.tw/handle/01423788174994370231 |
Similar Items
-
Floating-to-Fixed-Point Conversion for Digital Signal Processors
by: Menard Daniel, et al.
Published: (2006-01-01) -
DESIGN OF A FLOATING-POINT PROCESSOR FOR DIGITAL SIMULATION
by: Wiatrowski, Claude A.
Published: (1973) -
Design of Floating-point Processor for Elementary Functions
by: I-tong Liu, et al.
Published: (1999) -
Designs of floating-Point Processor
by: Lee, Chung-Yong, et al.
Published: (1996) -
Servo compensation using a floating point digital signal processor
by: Wittman, Susan Jean
Published: (2007)