Low Power I-Cache-based BTB
碩士 === 國立交通大學 === 資訊科學與工程研究所 === 94 === Reducing power consumption has gained much attention recently. BTB is a power-hungry device that supports dynamic branch prediction for pipelined processor. This thesis proposes and instruction cache based BTB architecture called ICBTB. It shares the tag memor...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/97925661337064014613 |