Performance of SRAM with Nanoscale Transistors

碩士 === 國立交通大學 === 電子工程系所 === 94 === Silicon-based planar MOSFETs have been the building block for SRAM. However, as the design rule continuously shrank down beyond the 45 nm, conventional planar CMOS devices encounter significant challenges. Many three-dimensional (3D) structure transistors, such as...

Full description

Bibliographic Details
Main Authors: Chien-Sung Lu, 呂建松
Other Authors: Tiao-Yuan Huang
Format: Others
Language:en_US
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/95674822677830684325