An Ultra-Wideband CMOS Power Amplifier for 3.1 to 10.6 GHz Wireless Applications
碩士 === 國立交通大學 === 電子工程系所 === 94 === This thesis is based on TSMC 0.18um CMOS process. A two-stage ultra-wideband CMOS power amplifier is applied for 3.1 to 10.6GHz. The 1st stage introduces the common-source and common-gate topology called “cascade” with the resistor feedback configuration. It bring...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/06126230117781025070 |