10-bit 200MHz Digital-to-Analog Converter with Low Nonlinearity Error

碩士 === 國立嘉義大學 === 光電暨固態電子研究所 === 94 === A design of high resolution current mode DAC employs a segmented architecture in this thesis. For the digital circuits of DACs, the segmented DAC architecture consists of two thermometer decoder sub-DACs, The thermometer based sub-DACs are both used as MSB and...

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Bibliographic Details
Main Authors: Jia-Hui Wang, 王家輝
Other Authors: Chang-Feng Yu
Format: Others
Language:en_US
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/02711987794467108977