A Wireless Digital IC Test System

• Main Authors: Hung-Yi Hu, 胡宏毅
• Other Authors: Tsin-Yuan Chang
• Format: Others
• Language: en_US
• Published: 2006
• Online Access: http://ndltd.ncl.edu.tw/handle/37336746355630918452

碩士 === 國立清華大學 === 電機工程學系 === 94 === Abstract Test cost and test accuracy are very important issues in novel circuit designs. According to the ITRS’03 report, test cost will never decrease with the advancement of integrate circuit fabrication technology. Focused on the test challenges, wireless test concepts are presented in recent years, since these approaches remove many dependencies found in traditional wire test structures and promote the accessibility of cores. In this thesis, a prototype with DFT designs is proposed to verify the overall concept of this wireless test system. To implement the wireless test system, the IrDA transceivers are applied as our wireless communication interface, and a micro-controller is applied as the test controller in our system. To demonstrate this system, a graphical user interface program is also constructed. Two types of DFT techniques including Build-In Self-Test and scan are implementation in this system. To verify the BIST operation, a 512K-Byte FPGA internal block RAM is taken as memory under test and the MBIST circuit is generated by BIST compiler. On the other hand, a simple ISCAS89 benchmark circuit S27 that has embedded scan chain inside through Design Compiler is applied to demonstrate the scan operation.