A Priority Assignment Strategy of Processing Elements over an On-Chip Bus
碩士 === 國立臺灣大學 === 資訊工程學研究所 === 94 === The number of bus transactions in multimedia SoC grows significantly in recent years. Because of different timing requirements for different applications, how to find a proper priority assignment for processing elements (PEs) of SoC becomes very challenging. In...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Online Access: | http://ndltd.ncl.edu.tw/handle/61159618652418753863 |