Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products
碩士 === 國立臺灣大學 === 電子工程學研究所 === 94 === With the scaling-down CMOS technology in nanometer generation, the power supply voltage is also decreased to reduce power consumption. The voltage levels of power supplies are different in different technology generations. For example, the VDD of core logic and...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/89147914337134584482 |