Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products
碩士 === 國立臺灣大學 === 電子工程學研究所 === 94 === With the scaling-down CMOS technology in nanometer generation, the power supply voltage is also decreased to reduce power consumption. The voltage levels of power supplies are different in different technology generations. For example, the VDD of core logic and...
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ndltd-TW-094NTU054281362015-12-16T04:38:40Z http://ndltd.ncl.edu.tw/handle/89147914337134584482 Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products 形變溫度施壓效應對八吋消費性產品晶圓之超薄閘極氧化層金氧半元件研究 Shang-Chih Lin 林尚志 碩士 國立臺灣大學 電子工程學研究所 94 With the scaling-down CMOS technology in nanometer generation, the power supply voltage is also decreased to reduce power consumption. The voltage levels of power supplies are different in different technology generations. For example, the VDD of core logic and I/O buffers in the typical 0.13-μm CMOS process are 1.2V and 2.5V, respectively. However, as the dimension scales down continuously and the density of device increases progressively that causes higher power consumption and complex package process. The above-mentioned problems give rise to two issues should be concern. One is the thermal effect on device performance and the other is the influence of wafer-sawing. The stress-related problems have become important issues in the CMOS technology. Many device failures are caused by the stresses occur during high temperature operations and wafer-sawing. In this thesis we will focus on the study of mechanical stress problems to examine the thermal effect. We will observe the mechanical stress issues and analyze the electrical characteristics on MOS capacitor system to confirm the improvement of thermal effect on Si/SiO2 system in the 8 inch wafer of consumer product. In chapter 1, we introduce the structure and process flow of 0.13um MOS capacitors on consumer products. In chapter 2, we present the principle and characteristics of MOS capacitorincluding C-V curve and I-V curve of an MOS capacitor. The history of the study of the stress effect on SiO2 is also described. In chapter 3, we investigated the thermal effect on MOS capacitors after receiving consecutive thermal treatments at 100℃ for 120 seconds with various mechanical stresses applied on the substrate. And the measurements of current variation and constant voltage stress (CVS) were performed to examine the electrical characteristics of devices. The experimental result shows that tensile-temperature stress sample exhibits the best properties. In the last chapter, conclusion and suggestion for future work are given. Jenn-Gwo Hwu 胡振國 2006 學位論文 ; thesis 106 en_US |
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碩士 === 國立臺灣大學 === 電子工程學研究所 === 94 === With the scaling-down CMOS technology in nanometer generation, the power supply voltage is also decreased to reduce power consumption. The voltage levels of power supplies are different in different technology generations. For example, the VDD of core logic and I/O buffers in the typical 0.13-μm CMOS process are 1.2V and 2.5V, respectively. However, as the dimension scales down continuously and the density of device increases progressively that causes higher power consumption and complex package process. The above-mentioned problems give rise to two issues should be concern. One is the thermal effect on device performance and the other is the influence of wafer-sawing. The stress-related problems have become important issues in the CMOS technology. Many device failures are caused by the stresses occur during high temperature operations and wafer-sawing. In this thesis we will focus on the study of mechanical stress problems to examine the thermal effect. We will observe the mechanical stress issues and analyze the electrical characteristics on MOS capacitor system to confirm the improvement of thermal effect on Si/SiO2 system in the 8 inch wafer of consumer product. In chapter 1, we introduce the structure and process flow of 0.13um MOS capacitors on consumer products. In chapter 2, we present the principle and characteristics of MOS capacitorincluding C-V curve and I-V curve of an MOS capacitor. The history of the study of the stress effect on SiO2 is also described. In chapter 3, we investigated the thermal effect on MOS capacitors after receiving consecutive thermal treatments at 100℃ for 120 seconds with various mechanical stresses applied on the substrate. And the measurements of current variation and constant voltage stress (CVS) were performed to examine the electrical characteristics of devices. The experimental result shows that tensile-temperature stress sample exhibits the best properties. In the last chapter, conclusion and suggestion for future work are given.
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author2 |
Jenn-Gwo Hwu |
author_facet |
Jenn-Gwo Hwu Shang-Chih Lin 林尚志 |
author |
Shang-Chih Lin 林尚志 |
spellingShingle |
Shang-Chih Lin 林尚志 Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products |
author_sort |
Shang-Chih Lin |
title |
Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products |
title_short |
Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products |
title_full |
Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products |
title_fullStr |
Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products |
title_full_unstemmed |
Investigation of Strain-Temperature Stress on Ultra-thin Gate Oxide on 8 Inch Wafer of Consumer Products |
title_sort |
investigation of strain-temperature stress on ultra-thin gate oxide on 8 inch wafer of consumer products |
publishDate |
2006 |
url |
http://ndltd.ncl.edu.tw/handle/89147914337134584482 |
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