FPGA IMPLEMENTATION OF ASYNCHRONOUS TWO-DIMENSIONAL DISCRETE COSINE TRANSFORM PROCESSOR
碩士 === 大同大學 === 電機工程學系(所) === 94 === This thesis proposes an asynchronous discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) processor core compliant with the CCITT recommendation H.261. We use the Sutherland Micropipeline structure to implement an asynchronous pipeline. It makes...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/19797435812837702911 |