Realization of a Parallel Image Processing System by Integrating Multiple Process Blocks on FPGA
碩士 === 國立中正大學 === 電機工程所 === 95 === In this thesis, we propose an architecture based on the FPGA parallel image processing system, using the image information incision skill to rise the efficiency of image processing. Base on this architecture, multiple high-speed image processing can be supported, s...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/12403452227648700041 |