New debug tool development for DDR2 (test mode control by system level verification)
碩士 === 長庚大學 === 半導體產業研發碩士專班 === 95 === Various debug methods have been developed through compatibility tests of Dynamic Random Access Memory and trouble-shooting of customer’s feedback to guarantee products function properly on different platforms. However, limited to the system’s environments, thes...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/70291405985981392097 |