Design of a Simple Pulse Width Control Loop Circuit by Using Digital Frequency Dividers
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 95 === Most digital and mixed-signal circuits use a lot of clock signals to trigger a periodic notification at the requested time. The accuracies on frequencies, phases and pulse widths of clock signals are very important for high speed applications. For the issues o...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/16523484272909484881 |