ESD Protection Design for High-Speed I/O Interface Circuit
碩士 === 國立交通大學 === 電機學院IC設計產業專班 === 95 === This thesis focuses on the ESD protection design for high-speed input/output (I/O) interface circuit. The gate oxide of the MOSFET transistor becomes thinner as the CMOS technology scales, which enables the high-speed I/O interface circuits with higher opera...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/53364598099683559066 |