Flexible On-chip Bus Encoding for Power Minimization under Delay Constraints
碩士 === 國立交通大學 === 電子工程系所 === 95 === As technology advances, the global interconnect delay and the power consumption of long wires become crucial issues in nanometer technologies. In particular, both inductive and capacitive coupling effects between wires result in serious problems such as crosstalk...
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| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/24086232015687880330 |