An Algorithm fo Large-Scale Analog Block Placement with Symmetry Constraints
碩士 === 國立交通大學 === 電子工程系所 === 95 === In recent years, in order to handle matching in high performance analog circuits, some cells are often required placed symmetrically to the axis. For the symmetry components for the analog circuits in our full floorplan, we hope that the cells of the same symmetry...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/87259009631943736158 |