Research of Dopant Activation at the Interface between Nickel Silicide and Silicon during Nickel Silicide Formation
碩士 === 國立交通大學 === 電子工程系所 === 95 === In advanced CMOS devices, as contact dimensions scale down to nanometer range, contact resistance of source and drain is increased correspondingly. As a result, the technique of metal silicides for poly gate and source/drain has been developed to reduce the contac...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/55794931103184283773 |